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lt1490a/lt1491a 1 14901afd typical application features description dual/quad over-the-top micropower rail-to-rail input and output op amps the lt ? 1490a/lt1491a are dual and quad op amps with a low input offset voltage of 500v max. the lt1490a/lt1491a operate on all single and split supplies with a total voltage of 2v to 44v, drawing only 40a of quiescent current per ampli- fier. these amplifiers are reverse supply protected; they draw virtually no current for reverse supply up to 18v. the input range of the lt1490a/lt1491a includes both supplies and the output swings to both supplies. unlike most micropower op amps, the lt1490a/lt1491a can drive heavy loads; their rail-to-rail outputs drive 20ma. the lt1490a/lt1491a are unity-gain stable and drive all capacitive loads up to 10,000pf when optional 0.22f and 150 compensation is used. the lt1490a/lt1491a have a unique input stage that oper- ates and remains high impedance when above the positive supply. the inputs take 44v both differential and common mode even when operating on a 3v supply. built-in resistors protect the inputs for faults below the negative supply up to 15v. there is no phase reversal of the output for inputs 15v below v C or 44v above v C , independent of v + . the lt1490a dual op amp is available in the 8-pin msop , pdip and so packages. for space limited applications lt1490a is available in a 3mm 3mm 0.8mm, dual fine pitch leadless package (dfn). the quad lt1491a is available in the 14-pin so, pdip and 5mm 3mm 0.8mm dfn packages. battery monitor applications n low input offset voltage: 500v max n output swings to 10mv max from v C n rail-to-rail input and output n micropower: 50a/amplifier max n over-the-top ? input common mode range extends 44v above v C , independent of v + n specified on 3v, 5v and 15v supplies n high output current: 20ma n output drives 10,000pf with output compensation n reverse battery protection to 18v n no supply sequencing problems n high voltage gain: 1500v/mv n high cmrr: 98db n no phase reversal n gain bandwidth product: 200khz n tiny 3mm 3mm 0.8mm dfn package n battery- or solar-powered systems portable instrumentation sensor conditioning n supply current sensing n battery monitoring n micropower active filters n 4ma to 20ma transmitters l , lt, ltc, ltm, over-the-top, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents including 5825228. C + C + r a 2k q2 2n3904 s1 s1 = open, gain = 1s1 = closed, gain = 10 r a = r b v s = 5v, 0v 10k 90.9k v out logic 1490a ta01 logic high (5v) = charginglogic low (0v) = discharging r g 10k q1 2n3904 r s 0.2 charger voltage 1/4 lt1491a1/4 lt1491a r a 2k r b 2k v batt = 12v i batt + r b 2k load C + C + v out (r s )(r g /r a )(gain) v out gain i batt = = amps 1/4 lt1491a1/4 lt1491a downloaded from: http:///
lt1490a/lt1491a 2 14901afd lt1490a lt1490a lt1490a 12 3 4 out a Cin a +in a v C 87 6 5 v + out b Cin b +in b top view ms8 package 8-lead plastic msop a b t jmax = 150c, ja = 250c/w 12 3 4 87 6 5 top view n8 package 8-lead pdip s8 package 8-lead plastic so v + out b Cin b +in b a b out a Cin a +in a v C t jmax = 150c, ja = 130c/w (n8) t jmax = 150c, ja = 190c/w (s8) top view dd package 8-lead (3mm w 3mm) plastic dfn 5 6 7 8 4 3 2 1 out a Cin a+in a v C v + out bCin b +in b a b t jmax = 125c, ja = 160c/w (note 2) underside metal connected to v C lt1491a lt1491a top view s package 14-lead plastic so n package 14-lead pdip 12 3 4 5 6 7 1413 12 11 10 98 out a Cin a +in a v + +in b Cin b out b out d Cin d +in d v C +in c Cin c out c a d b c t jmax = 150c, ja = 110c/w (n) t jmax = 150c, ja = 150c/w (s) 1615 14 13 12 11 10 9 12 3 4 5 6 7 8 out dCin d +in d vC +in c Cin c out c nc out a Cin a+in a v+ +in bCin b out b nc top view dhc16 package 16-lead (5mm w 3mm) plastic dfn a d b c t jmax = 125c, ja = 160c/w (note 2) underside metal connected to v C absolute maximum ratings total supply voltage (v+ to vC) ............................... 44v differential input voltage ......................................... 44v input current (note 9) ......................................... 12ma output short-circuit duration (note 2) ........ continuous operating temperature range (note 3) lt1490ac/lt1491ac ........................... C40c to 85c lt1490ai/lt1491ai ............................. C40c to 85c lt1490ah/lt1491ah ......................... C40c to 125c (note 1) pin configuration specified temperature range (note 4) lt1490ac/lt1490ai ............................ C40c to 85c lt1491ac/lt1491ai ............................. C40c to 85c lt1490ah/lt1491ah ......................... C40c to 125c junction temperature .......................................... 150c junction temperature (dd/dhc package) ........... 125c storage temperature range ................. C65c to 150c storage temperature range dd/dhc package .............................. C65c to 125c lead temperature (soldering, 10 sec) .................. 300c downloaded from: http:///
lt1490a/lt1491a 3 14901afd order information lead free finish tape and reel part marking* package description specified temperature range lt1490acms8#pbf lt1490acms8#trpbf ltng 8-lead plastic msop 0c to 70c lt1490aims8#pbf lt1490aims8#trpbf ltpu 8-lead plastic msop C40c to 85c lt1490ahms8#pbf lt1490ahms8#trpbf ltrk 8-lead plastic msop C40c to 125c lt1490acs8#pbf lt1490acs8#trpbf 1490a 8-lead plastic so 0c to 70c lt1490ais8#pbf lt1490ais8#trpbf 1490ai 8-lead plastic so C40c to 85c lt1490ahs8#pbf lt1490ahs8#trpbf 1490ah 8-lead plastic so C40c to 125c lt1490acn8#pbf lt1490acn8#trpbf lt1490acn8 8-lead pdip 0c to 70c lt1490ain8#pbf lt1490ain8#trpbf lt1490ain8 8-lead pdip C40c to 85c lt1490acdd#pbf lt1490acdd#trpbf laah 8-lead (3mm 3mm) plastic dfn 0c to 70c lt1490aidd#pbf lt1490aidd#trpbf laah 8-lead (3mm 3mm) plastic dfn C40c to 85c lt1491acs#pbf lt1491acs#trpbf lt1491acs 14-lead plastic so 0c to 70c lt1491ais#pbf lt1491ais#trpbf lt1491ais 14-lead plastic so C40c to 85c lt1491ahs#pbf lt1491ahs#trpbf lt1491ahs 14-lead plastic so C40c to 125c lt1491acn#pbf lt1491acn#trpbf lt1491acn 14-lead pdip 0c to 70c lt1491ain#pbf lt1491ain#trpbf lt1491ain 14-lead pdip C40c to 85c lt1491acdhc#pbf lt1491acdhc#trpbf 1491a 16-lead (5mm 3mm) plastic dfn 0c to 70c lt1491aidhc#pbf lt1491aidhc#trpbf 1491a 16-lead (5mm 3mm) plastic dfn C40c to 85c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ downloaded from: http:///
lt1490a/lt1491a 4 14901afd electrical characteristics the denotes specifications which apply over the full operating temperature range of C 40c t a 85c, otherwise specifications are at t a = 25c. v s = 3v, 0v; v s = 5v, 0v; v cm = v out = half supply unless otherwise noted. (note 4) symbol parameter conditions lt1490ac/lt1491ac lt1490ai/lt1491ai units min typ max v os input offset voltage (note 5) lt1490a n, s packages 0c t a 70c C40c t a 85c ll 110 500 700800 vv v lt1490a ms8 package, lt1491a n, s packages 0c t a 70c C40c t a 85c ll 220 1000 12001400 vv v lt1490a dd, lt1491a dhc 0c t a 70c C40c t a 85c ll 250 1200 14001600 vv v input offset voltage drift (note 9) C40c t a 85c lt1490a dd, lt1491a dhc, C40c t a 85c ll 22 46 v/c v/c i os input offset current v cm = 44v (note 6) ll 0.2 0.8 0.8 naa i b input bias current v cm = 44v (note 6) v s = 0v ll 13 0.3 8 10 naa na input bias current drift C40c t a 85c l 2 pa/c input noise voltage 0.1hz to 10hz 1 v p-p e n input noise voltage density f = 1khz 50 nv/ hz i n input noise current density f = 1khz 0.015 pa/ hz r in input resistance differential common mode, v cm = 0v to 44v 64 1711 mm c in input capacitance 4.6 pf input voltage range l 04 4 v cmrr common mode rejection ratio (note 6) v cm = 0v to v cc C 1v v cm = 0v to 44v ll 8480 9898 dbdb a vol large-signal voltage gain v s = 3v, v o = 500mv to 2.5v, r l = 10k 0c t a 70c C40c t a 85c ll 200133 100 1500 v/mv v/mv v/mv v s = 5v, v o = 500mv to 4.5v, r l = 10k 0c t a 70c C40c t a 85c ll 400250 200 1500 v/mv v/mv v/mv v ol output voltage swing low v s = 3v, no load v s = 3v, i sink = 5ma ll 3 250 10 450 mvmv v s = 5v, no load v s = 5v, i sink = 5ma v s = 5v, i sink = 10ma ll 3 250330 10 500500 mvmv mv v oh output voltage swing high v s = 3v, no load v s = 3v, i source = 5ma ll 2.952.55 2.978 2.6 vv v s = 5v, no load v s = 5v, i source = 10ma ll 4.954.30 4.978 4.6 vv i sc short-circuit current (note 2) v s = 3v, short to gnd v s = 3v, short to v cc 1010 1530 mama v s = 5v, short to gnd v s = 5v, short to v cc 1515 2530 mama downloaded from: http:///
lt1490a/lt1491a 5 14901afd electrical characteristics the denotes specifications which apply over the full operating temperature range of C 40c t a 85c, otherwise specifications are at t a = 25c. v s = 3v, 0v; v s = 5v, 0v; v cm = v out = half supply unless otherwise noted. (note 4) the denotes specifications which apply over the full operating temperature range of C 40c t a 85c, otherwise specifications are at t a = 25c. v s = 15v, v cm = 0v, v out = 0v unless otherwise noted. (note 4) symbol parameter conditions lt1490ac/lt1491ac lt1490ai/lt1491ai units min typ max psrr power supply rejection ratio v s = 2.5v to 12.5v, v cm = v o = 1v l 84 98 db minimum operating supply voltage l 2 2.5 v reverse supply voltage i s = C100a per amplifier l 18 27 v i s supply current per amplifier (note 7) l 40 50 55 aa gbw gain bandwidth product (note 6) f = 1khz0c t a 70c C40c t a 85c ll 110100 90 180 khz khzkhz sr slew rate (note 8) a v = C1, r l = 0c t a 70c C40c t a 85c ll 0.0350.031 0.030 0.06 v/s v/s v/s symbol parameter conditions lt1490ac/lt1491ac lt1490ai/lt1491ai units min typ max v os input offset voltage (note 5) lt1490a n, s packages 0c t a 70c C40c t a 85c ll 150 700 950 1100 vv v lt1490a ms8 package, lt1491a n, s packages 0c t a 70c C40c t a 85c ll 250 1200 13501500 vv v lt1490a dd, lt1491a dhc 0c t a 70c C40c t a 85c ll 285 1400 15501700 vv v input offset voltage drift (note 9) C40c t a 85c lt1490a dd, lt1491a dhc, C40c t a 85c ll 22 67 v/c v/c i os input offset current l 0.2 0.8 na i b input bias current l 18 n a input bias current drift C40c t a 85c l 5 pa/c input noise voltage 0.1hz to 10hz 1 v p-p e n input noise voltage density f = 1khz 50 nv/ hz i n input noise current density f = 1khz 0.015 pa/ hz r in input resistance differential common mode, v cm = C15v to 14v 61 7 15000 mm c in input capacitance 4.6 pf input voltage range l C15 29 v cmrr common mode rejection ratio v cm = C15v to 29v l 80 98 db a vol large-signal voltage gain v o = 14v, r l = 10k 0c t a 70c C40c t a 85c ll 100 7550 250 v/mv v/mv v/mv v o output voltage swing no load i out = 5ma i out = 10ma ll 14.914.5 14.5 14.97814.750 14.670 vv v downloaded from: http:///
lt1490a/lt1491a 6 14901afd electrical characteristics the denotes specifications which apply over the full operating temperature range of C 40c t a 85c, otherwise specifications are at t a = 25c. v s = 15v, v cm = 0v, v out = 0v unless otherwise noted. (note 4) the denotes specifications which apply over the full operating temperature range of C 40c t a 125c, v s = 3v, 0v; v s = 5v, 0v; v cm = v out = half supply unless otherwise noted. (note 4) symbol parameter conditions lt1490ac/lt1491ac lt1490ai/lt1491ai units min typ max i sc short-circuit current (note 2) short to gnd 0c t a 70c C40c t a 85c 2015 10 25 ma mama psrr power supply rejection ratio v s = 1.25v to 22v l 88 98 db i s supply current per amplifier l 50 70 85 aa gbw gain bandwidth product f = 1khz 0c t a 70c C40c t a 85c ll 125110 100 200 khz khzkhz sr slew rate a v = C1, rl = , v o = 10v, measured at v o = 5v 0c t a 70c C40c t a 85c ll 0.03750.0330 0.0300 0.07 v/s v/s v/s symbol parameter conditions lt1490ah/lt1491ah units min typ max v os input offset voltage (note 5) lt1490ahs8 l 110 500 2500 vv lt1490ahms8, lt1491ahs l 220 1000 3000 v v input offset voltage drift (note 9) l 3 6 v/c i os input offset current v cm = 44v (note 6) ll 2 1.5 naa i b input bias current v cm = 44v (note 6) ll 2015 naa input voltage range l 0.3 44 v cmrr common mode rejection ratio (note 6) v cm = 0.3v to v cc C1v v cm = 0.3v to 44v ll 6074 dbdb a vol large-signal voltage gain v s = 3v, v o = 500mv to 2.5v, r l = 10k l 200 25 1500 v/mv v/mv v s = 5v, v o = 500mv to 4.5v, r l = 10k l 400 50 1500 v/mv v/mv v ol output voltage swing low v s = 3v, no load v s = 3v, i sink = 2.5ma ll 15 450 mvmv v s = 5v, no load v s = 5v, i sink = 2.5ma ll 15 500 mvmv v oh output voltage swing high v s = 3v, no load v s = 3v, i source = 5ma ll 2.9252.350 vv v s = 5v, no load v s = 5v, i source = 10ma ll 4.9254.100 vv psrr power supply rejection ratio v s = 2.5v to 12.5v, v cm = v o = 1v l 80 db minimum operating supply voltage l 2.5 v reverse supply voltage i s = C100a per amplifier l 18 v downloaded from: http:///
lt1490a/lt1491a 7 14901afd electrical characteristics the denotes specifications which apply over the full operating temperature range of C 40c t a 125c. v s = 15v, v cm = 0v, v out = 0v unless otherwise noted. (note 4) symbol parameter conditions lt1490ah/lt1491ah units min typ max i s supply current per amplifier (note 7) l 40 50 70 aa gbw gain bandwidth product (note 6) f = 1khz l 110 60 180 khz khz sr slew rate (note 8) a v = C1, r l = l 0.0350.015 0.06 v/s v/s v os input offset voltage (note 5) lt1490ahs8 l 150 700 2700 vv lt1490ahms8, lt1491ahs l 250 1200 3200 vv input offset voltage drift (note 9) l 3 7 v/c i os input offset current l 2n a i b input bias current l 20 na input voltage range l C14.7 29 v cmrr common mode rejection ratio v cm = C14.7v to 29v l 72 db a vol large-signal voltage gain v o = 14v, r l = 10k l 100 4 250 v/mv v/mv v o output voltage swing no load i out = 2.5ma ll 14.814.3 vv psrr power supply rejection ratio v s = 1.25v to 22v l 84 db i s supply current per amplifier l 50 70 95 aa gbw gain bandwidth product f = 1khz l 125 75 200 khz khz sr slew rate a v = C1, r l = l 0.0375 0.02 0.07 v/s v/s note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: a heat sink may be required to keep the junction temperature below absolute maximum. this depends on the power supply voltage and how many ampli ers are shorted. the ja speci ed for the dd and dhc package is with minimal pcb heat spreading metal. using expanded metal area on all layers of a board reduces this value. note 3: the lt1490ac/lt1491ac and lt1490ai/lt1491ai are guaranteed functional over the operating temperature range of 40? to 85?. the lt1490ah/lt1491ah are guaranteed functional over the operating temperature range of ?0? to 125?. note 4: the lt1490ac/lt1491ac are guaranteed to meet speci ed performance from 0? to 70?. the lt1490ac/lt1491ac are designed, characterized and expected to meet speci ed performance from ?0? to 85? but are not tested or qa sampled at these temperatures. the lt1490ai/lt1491ai are guaranteed to meet speci ed performance from 40? to 85?. the lt1490ah/lt1491ah are guaranteed to meet speci ed performance from 40? to 125?. note 5: esd (electrostatic discharge) sensitive device. extensive use of esd protection devices are used internal to the lt1490a/lt1491a. however, high electrostatic discharge can damage or degrade the device. use proper esd handling precautions. note 6: v s = 5v limits are guaranteed by correlation to v s = 3v and v s = ?5v tests. note 7: v s = 3v limits are guaranteed by correlation to v s = 5v and v s = ?5v tests. note 8: guaranteed by correlation to slew rate at v s = ?5v and gbw at v s = 3v and v s = ?5v tests. note 9: this parameter is not 100% tested. downloaded from: http:///
lt1490a/lt1491a 8 14901afd typical performance characteristics output saturation voltage vs load current (output high) output saturation voltage vs load current (output low) output saturation voltage vs input overdrive 0.1hz to 10hz noise voltage noise voltage density vs frequency input noise current vs frequency supply current vs supply voltage minimum supply voltage input bias current vs common mode voltage total supply voltage (v) 0 0 supply current per amplifier (a) 10 30 40 50 70 10 20 25 45 1490a g01 20 8060 51 5 30 35 40 t a = 125c t a = 25c t a = C55c total supply voltage (v) 0 change in input offset voltage (v) 200 400 4 1490a g02 0 C200 100 300 C100 C300 C 400 1 2 3 5 t a = 25c t a = 125c t a = C55c common mode voltage (v) 4.0 C0.4 0 input bias current (na) 50003000 1000 3020 10 0 C10 5.6 1490a g03 4.4 4.8 5.2 44 t a = C55c t a = 25c t a = 125c v s = 5v, 0v sourcing load current (a) 1 output saturation voltage (v) 100m 10m 1490a g04 10m 10 100 1m 100m 1 t a = 125c v s = 5v, 0v t a = 25c t a = C55c sinking load current (a) 0.1 1m output saturation voltage (v) 10m 100m 1 1 10 100 1m 1490a g05 10m 100m t a = 125c v s = 5v, 0v t a = 25c t a = C55c input overdrive (mv) 0 output saturation voltage (mv) 60 80 100 40 1490a g06 4020 50 70 9030 10 0 10 20 30 50 output high output low v s = 5v, 0v no load time (sec) noise voltage (400nv/div) 2468 1490a g07 10 1 03579 v s = 2.5v frequency (hz) 1 40 input noise voltage density (nv/ hz ) 60 80 100 10 100 1k 1490a g08 20 120 frequency (hz) 1 input noise current density (pa/ hz ) 10 100 1k 1490a g09 0.20 0.25 0.30 0.35 0.150.10 0.05 0 downloaded from: http:///
lt1490a/lt1491a 9 14901afd typical performance characteristics gain bandwidth product and phase margin vs supply voltage cmrr vs frequency psrr vs frequency gain bandwidth product and phase margin vs load resistance channel separation vs frequency output impedance vs frequency gain and phase shift vs frequency gain bandwidth product vs temperature slew rate vs temperature frequency (khz) 1 10 gain (db) phase shift (deg) 20 30 40 50 10 100 1000 1490a g10 0 C10 C20 C30 60 70 C20 0 20 40 60 C40 C60 C80 C100 80 100 v s = 2.5v phase gain temperature (c) C50 gain bandwidth product (khz) 120 140 160 260200 0 50 75 1490a g11 100 220 240180 C25 25 100 125 v s = 15v v s = 1.5v f = 1khz temperature (c) C50 slew rate (v/s) 0 50 75 1490a g12 0.04 0.06 0.10 0.120.08 C25 25 100 125 rising, v s = 15v rising, v s = 1.5v falling, v s = 1.5v falling, v s = 15v total supply voltage (v) 0 150 gain bandwidth product (khz) phase margin (deg) 160 180 190 200 250220 10 20 25 45 1490a g13 170 230 240210 10 30 6020 5040 51 5 30 35 40 r l = 10k f = 1khz phase margin gain bandwidth frequency (khz) 1 common mode rejection ratio (db) 10 120100 8060 40 20 100 1490a g14 v s = 15v v s = 1.5v frequency (khz) 1 C20 power supply rejection ratio (db) 0 20 40 60 10 100 1490a g15 C10 10 30 50 70 80 v s = 2.5v positive supply negative supply load resistance (k) 1 50 gain bandwidth product (khz) phase margin (deg) 100 150 200 250 350 10 100 1490a g16 300 20 30 40 50 60 80 70 v s = 2.5v a v = C1 r f = r g = 100k f = 1khz phase margin gain bandwidth frequency (khz) 0.1 90 channel separation (db) 100 110 120 130 1 10 100 1490a g17 8070 50 40 60 v s = 15v frequency (khz) 0.1 output impedance () 100 1k 10k 1 10 100 1490a g18 10 1 0.1 v s = 2.5v a v = 100 a v = 10 a v = 1 downloaded from: http:///
lt1490a/lt1491a 10 14901afd typical performance characteristics total harmonic distortion + noise vs frequency total harmonic distortion + noise vs load resistance total harmonic distortion + noise vs output voltage open-loop gain large-signal response small-signal response undistorted output swing vs frequency settling time to 0.1% vs output step capacitive load handling, overshoot vs capacitive load frequency (khz) 0.1 20 output swing (v p-p ) 25 30 35 1 10 100 1490a g19 1510 50 distortion 1% v s = 15v v s = 5v, 0v settling time (s) 0 C10 output step (v) C8 C4 C2 0 10 4 40 80 100 1490a f20 C6 6 8 2 20 60 120 140 160 v s = 15v a v = C1 a v = C1 a v = 1 a v = 1 capacitive load (pf) 20 overshoot (%) 40 6050 80 100 10 30 70 90 10 100 1000 10000 1490a g21 0 v s = 5v, 0v i source = 170a a v = 1 a v = 2 a v = 5 a v = 10 frequency (khz) 0.01 thd + noise (%) 0.1 1 10 0.01 1 10 1490a g22 0.001 0.1 v s = 3v, 0v v out = 2v p-p v cm = 1.2v r l = 50k a v = C1 a v = 1 load resistance to ground (k) 0.01 thd + noise (%) 0.1 1 10 0.1 10 100 1490a g23 0.001 1 v s = 3v total a v = 1 v in = 2v p-p at 1khz v s = 1.5v v in = 1v v s = 3v, 0v v in = 0.5v to 2.5v v s = 3v, 0v v in = 0.2v to 2.2v output voltage (v p-p ) 0.01 thd + noise (%) 1 10 02 3 1490a g24 0.001 1 0.1 r l = 10k v cm = half supply f = 1khz a v = 1 v s = 3v, 0v a v = C1 v s = 3v, 0v a v = C1 v s = 1.5v a v = 1 v s = 1.5v change in input offset voltage (100v/div) 0v output voltage (5v/div) 10v r l = 50k r l = 2k r l = 10k v s = 15v 1490a g25 C10v v s = 15v a v = C1 1491a g26 v s = 15v a v = 1 1491a g27 downloaded from: http:///
lt1490a/lt1491a 11 14901afd applications information supply voltage the positive supply pin of the lt1490a/lt1491a should be bypassed with a small capacitor (about 0.01f) within an inch of the pin. when driving heavy loads an additional 4.7f electrolytic capacitor should be used. when using split supplies, the same is true for the negative supply pin. the lt1490a/lt1491a are protected against reverse battery voltages up to 18v. in the event a reverse battery condition occurs, the supply current is less than 1na. the lt1490a/lt1491a can be shut down by removing v + . in this condition the input bias current is typically less than 0.5na, even if the inputs are 44v above the negative supply. when operating the lt1490a/lt1491a on total supplies of 20v or more, the supply must not rise to its final voltage in less than 1s. this is especially true if low esr bypass capacitors are used. a series rlc circuit is formed from the supply lead inductance and the bypass capacitor. a resistance of 7.5 in the supply or in the bypass capacitor will dampen the tuned circuit enough to limit the rise time. inputs the lt1490a/lt1491a have two input stages, npn and pnp (see the simplified schematic), resulting in three distinct operating regions as shown in the input bias current vs common mode typical performance curve. for input voltages about 0.8v or more below v + , the pnp input stage is active and the input bias current is typically C1na. when the input voltage is about 0.5v or less from v + , the npn input stage is operating and the input bias current is typically 25na. increases in temperature will cause the voltage at which operation switches from the pnp stage to the npn stage to move towards v + . the input offset voltage of the npn stage is untrimmed and is typically 600v. a schottky diode in the collector of each npn transistor of the npn input stage allows the lt1490a/lt1491a to operate with either or both of their inputs above v + . at about 0.3v above v + the npn input transistor is fully saturated and the input bias current is typically 3a at room temperature. the input offset voltage is typically 700v when operating above v + . the lt1490a/lt1491a will operate with their inputs 44v above v C regardless of v + . the inputs are protected against excursions as much as 15v below v C by an internal 1k resistor in series with each input and a diode from the input to the negative supply. there is no output phase reversal for inputs up to 15v below v C . there are no clamping diodes between the inputs and the maximum differential input voltage is 44v. output the output voltage swing of the lt1490a/lt1491a is affected by input overdrive as shown in the typical per- formance curves. the output of the lt1490a/lt1491a can be pulled up to 18v beyond v + with less than 1na of leakage current, provided that v + is less than 0.5v. the normally reverse-biased substrate diode from the output to v C will cause unlimited currents to flow when the output is forced below v C . if the current is transient and limited to 100ma, no damage will occur. the lt1490a/lt1491a are internally compensated to drive at least 200pf of capacitance under any output loading conditions. a 0.22f capacitor in series with a 150 resis- tor between the output and ground will compensate these amplifiers for larger capacitive loads, up to 10,000pf, at all output currents. distortion there are two main contributors of distortion in op amps: output crossover distortion as the output transitions from sourcing to sinking current and distortion caused by nonlinear common mode rejection. of course, if the op amp is operating inverting there is no common mode induced distortion. when the lt1490a/lt1491a switch between input stages there is significant nonlinearity in the cmrr. lower load resistance increases the output crossover distortion, but has no effect on the input stage transition distortion. for lowest distortion the lt1490a/ lt1491a should be operated single supply, with the out- put always sourcing current and with the input voltage swing between ground and (v + C 0.8v). see the typical performance characteristics curves. downloaded from: http:///
lt1490a/lt1491a 12 14901afd applications information gainthe open-loop gain is almost independent of load when the output is sourcing current. this optimizes performance in single supply applications where the load is returned to ground. the typical performance photo of open-loop gain for various loads shows the details. typical applications simplified schematic square wave oscillator optional output compensation for capacitive loads greater than 200pf C + v out 1490a ta02 100k 100k c0.1f v out = 5v p-p with 5v supply i s = 200a 59k 1/2 lt1490a 5v r 50k f = 1 2rc at v s = 5v, r = 50k, c = 1nf output is 5khz slew limited triangle wave C + v in 1490a ta04 0.22f c l 10,000pf 150 1/2 lt1490a q10 d5 q9 q1 q7 r2 1k r3 1k r440k q8 q5 Cin +in q11 q12 d4 one amplifier d2 q2 d1 q6 q13 q14 r130k r540k q4 2a + q15 q19 d3 q3 q16 q18 q22 v + q17 q20 q21 out v C 1490a ss downloaded from: http:///
lt1490a/lt1491a 13 14901afd package description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. 3.00 t 0.10 (4 sides) note:1. drawing to be made a jedec package outline m0-229 variation of (weed-1) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on top and bottom of package 0.40 t 0.10 bottom viewexposed pad 1.65 t 0.10 (2 sides) 0.75 t 0.05 r = 0.125 typ 2.38 t 0.10 1 4 8 5 pin 1 top mark (note 6) 0.200 ref 0.00 C 0.05 (dd8) dfn 0509 rev c 0.25 t 0.05 2.38 t 0.05 recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 1.65 t 0.05 (2 sides) 2.10 t 0.05 0.50bsc 0.70 t 0.05 3.5 t 0.05 packageoutline 0.25 t 0.05 0.50 bsc dd package 8-lead plastic dfn (3mm w 3mm) (reference ltc dwg # 05-08-1698 rev c) msop (ms8) 0307 rev f 0.53 t 0.152 (.021 t .006) seating plane note:1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.18 (.007) 0.254 (.010) 1.10 (.043) max 0.22 C 0.38 (.009 C .015) typ 0.1016 t 0.0508 (.004 t .002) 0.86 (.034) ref 0.65 (.0256) bsc 0 s C 6 s typ detail a detail a gauge plane 12 3 4 4.90 t 0.152 (.193 t .006) 8 7 6 5 3.00 t 0.102 (.118 t .004) (note 3) 3.00 t 0.102 (.118 t .004) (note 4) 0.52 (.0205) ref 5.23 (.206) min 3.20 C 3.45 (.126 C .136) 0.889 t 0.127 (.035 t .005) recommended solder pad layout 0.42 t 0.038 (.0165 t .0015) typ 0.65 (.0256) bsc ms8 package 8-lead plastic msop (reference ltc dwg # 05-08-1660 rev f) downloaded from: http:///
lt1490a/lt1491a 14 14901afd package description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. n8 rev i 0711 .065 (1.651) typ .045 C .065 (1.143 C 1.651) .130 t .005 (3.302 t 0.127) .020 (0.508) min .018 t .003 (0.457 t 0.076) .120 (3.048) min .008 C .015 (0.203 C 0.381) .300 C .325 (7.620 C 8.255) .325 +.035C.015 +0.889C0.381 8.255 12 3 4 87 6 5 .255 t .015* (6.477 t 0.381) .400* (10.160) max note:1. dimensions are inches millimeters *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010 inch (0.254mm) .100 (2.54) bsc n package 8-lead pdip (narrow .300 inch) (reference ltc dwg # 05-08-1510 rev i) .016 C .050 (0.406 C 1.270) .010 C .020 (0.254 C 0.508) s 45 o 0 o C 8 o typ .008 C .010 (0.203 C 0.254) so8 0303 .053 C .069 (1.346 C 1.752) .014 C .019 (0.355 C 0.483) typ .004 C .010 (0.101 C 0.254) .050 (1.270) bsc 1 2 3 4 .150 C .157 (3.810 C 3.988) note 3 8 7 6 5 .189 C .197 (4.801 C 5.004) note 3 .228 C .244 (5.791 C 6.197) .245 min .160 p .005 recommended solder pad layout .045 p .005 .050 bsc .030 p .005 typ inches (millimeters) note:1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm) s8 package 8-lead plastic small outline (narrow .150 inch) (reference ltc dwg # 05-08-1610) downloaded from: http:///
lt1490a/lt1491a 15 14901afd package description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. n14 rev i 0711 .020 (0.508) min .120 (3.048) min .130 .005 (3.302 0.127) .045 C .065 (1.143 C 1.651) .065 (1.651) typ .018 .003 (0.457 0.076) .005 (0.127) min .255 .015* (6.477 0.381) .770* (19.558) max 3 1 2 4 5 6 7 8 9 10 11 12 13 14 .008 C .015 (0.203 C 0.381) .300 C .325 (7.620 C 8.255) .325 +.035C.015 +0.889 C0.381 8.255 note:1. dimensions are inches millimeters *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010 inch (0.254mm) .100 (2.54) bsc 1 n 2 3 4 .150 C .157 (3.810 C 3.988) note 3 14 13 .337 C .344 (8.560 C 8.738) note 3 .228 C .244 (5.791 C 6.197) 12 11 10 9 5 6 7 n/2 8 .016 C .050 (0.406 C 1.270) .010 C .020 (0.254 C 0.508) w 45 0 C 8 typ .008 C .010 (0.203 C 0.254) s14 0502 .053 C .069 (1.346 C 1.752) .014 C .019 (0.355 C 0.483) typ .004 C .010 (0.101 C 0.254) .050 (1.270) bsc .245 min n 123 n/2 .160 .005 recommended solder pad layout .045 .005 .050 bsc .030 .005 typ inches (millimeters) note:1. dimensions in 2. drawing not to scale3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm) n package 14-lead pdip (narrow .300 inch) (reference ltc dwg # 05-08-1510 rev i) s package 14-lead plastic small outline (narrow .150 inch) (reference ltc dwg # 05-08-1610) downloaded from: http:///
lt1490a/lt1491a 16 14901afd package description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. 3.00 p 0.10 (2 sides) 5.00 p 0.10 (2 sides) note:1. drawing proposed to be made variation of version (wjed-1) in jedec package outline mo-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 p 0.10 bottom viewexposed pad 1.65 p 0.10 (2 sides) 0.75 p 0.05 r = 0.115 typ r = 0.20 typ 4.40 p 0.10 (2 sides) 1 8 16 9 pin 1 top mark (see note 6) 0.200 ref 0.00 C 0.05 (dhc16) dfn 1103 0.25 p 0.05 pin 1notch 0.50 bsc 4.40 p 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 p 0.05 (2 sides) 2.20 p 0.05 0.50 bsc 0.65 p 0.05 3.50 p 0.05 packageoutline 0.25 p 0.05 dhc package 16-lead plastic dfn (5mm 3mm) (reference ltc dwg # 05-08-1706) downloaded from: http:///
lt1490a/lt1491a 17 14901afd information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number c 10/10 changed units from mv to v for v o in electrical characteristics updated package drawings 7 13-16 d 12/11 revised order information 3 (revision history begins at rev c) downloaded from: http:///
lt1490a/lt1491a 18 14901afd linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2011 lt 1211 rev d printed in usa related parts typical application ring-tone generator C + C + C + C + 1490a ta03 r6 10k r2 47k r7 16k r8 620k r4 1.6m r133k r310k r5100k r10620k c4 0.068f 9 10 6 7 8 1 5 c30.047f c5 0.01f r13 130k r12 10k r1547k r1410k r24 420 c7 47f load up toten phones r234.7k r262k q52n3904 q42n3906 q2 irf9620 C180v power amplifier smoothing filter 20hz oscillator cadence oscillator *led of opto1 illuminates when the phone is off the hooksee design note dn134 for a discussion of the circuit r18 100 r17 620 r16 100k z1 15v 100k r254.7k c60.033f r21150 r19620 z2 15v r9 300k r11 10k d1 1n4148 c2 0.47f c11f 2 3 1/4 lt1491a 1/4 lt1491a 12 4 11 13 q1 irf628 q3 2n3904 60v 14 1/4 lt1491a opto1* r20 100k 1/4 lt1491a part number description comments lt1366/lt1367 dual/quad precision, rail-to-rail input and output op amps 475v v os(max) , 500v/mv a vol(min) , 400khz gbw lt1636 single over-the-top micropower rail-to-rail input and output op amp 55a supply current, v cm extends 44v above v ee , independent of v cc , msop package, shutdown function lt1638/lt1639 dual/quad 1.2mhz over-the-top micropower, rail-to-rail input and output op amps 0.4v/s slew rate, 230a supply current per amplifier lt1782 micropower, over-the-top, sot-23, rail-to-rail input and output op amp sot-23, 800v v os(max) , i s = 55a (max), gain-bandwidth = 200khz, shutdown pin lt1783 1.2mhz, over-the-top, micropower, rail-to-rail input and output op amp sot-23, 800v v os(max) , i s = 300a (max), gain-bandwidth = 1.2mhz, shutdown pin downloaded from: http:///

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